As one of bonded wafers obtained by bonding two silicon wafers, there is an SOI (Silicon On Insulator) wafer. This SOI wafer is a bonded wafer having a silicon layer (which may be referred to as an SOI layer hereinafter) formed on a silicon oxide film as an insulator film, and has characteristics, e.g., a small parasitic capacitance or a high radiation resistance capability since the SOI layer in a substrate surface layer portion serving as a device fabrication region is electrically separated from the inside of a substrate through a buried insulator layer (a buried oxide film layer (a BOX layer)). Therefore, effects such as a high-speed/low-power consumption operation, software error prevention and others are expected, and this wafer appears promising as a substrate for a high-performance semiconductor device.
Such a bonded wafer, e.g., an SOI wafer is manufactured by forming a thermal oxide film on a surface of at least one of a bond wafer and a base wafer that are formed of, e.g., a silicon single crystal, then closely attaching the two wafers through the formed thermally oxide film, performing a bonding heat treatment to increase a bonding force, and thereafter reducing a film thickness of the bond wafer by grinding or mirror polishing to provide an SOI layer.
On the other hand, as a method for reducing a film thickness of a bond wafer, there is a method for reducing a film thickness of the bond wafer by previously forming an ion implanted layer consisting of, e.g., hydrogen ions on the bond wafer before bonding, bonding the bond wafer to a base wafer, and then effecting delamination at the ion implanted layer besides the method utilizing grinding/polishing. Since this ion implantation delamination method can reduce a film thickness of the SOI layer to be fabricated and provide the very excellent film thickness uniformity, it has been actively used.
When manufacturing the bonded wafer as explained above, an orientation flat (an OF) or a notch is formed at a wafer outer edge portion of each of a base wafer and a bond wafer to be formed in order to indicate a crystal orientation. This OF or notch is utilized as a positional reference for, e.g., mask matching in device manufacture. In particular, in a wafer having a diameter of 300 mm or above, a notch is formed often in recent years since an area to be ground is increased in case of the OF when performing cylindrical grinding with respect to an ingot fabricated by a Czochralski method.
Further, to improve device characteristics of, e.g., an MOS transistor, when manufacturing a bonded wafer that becomes a material, a bond wafer may be bonded to a base wafer in such a manner that a crystal orientation of the bond wafer matches with a device pattern. At this time, there is a technology that utilizes notches as indexes of the crystal orientations formed in the base wafer and the bond wafer to bond these wafers in such a manner that ends of the two notches match with each other or rotates the notches of the base wafer and the bond wafer a predetermined angle, e.g., 45 degrees to bond these wafers (see, e.g., Japanese Patent Application Laid-open No. 2002-134374).
However, even if the base wafer and the bond wafer are bonded to each other while adjusting a rotation angle of their notches in manufacture of the bonded wafer, the two wafers are not accurately bonded to each other in some cases. A typical example is a shift of a rotation angle, which is called a notch shift.
When a bonded wafer having a bond wafer attached thereto whose rotation angle deviates from a desired one enters a device manufacturing process, there is risk that the bonded wafer vary during, e.g., etching or pattern formation due to a difference in crystal orientation caused by a notch shift and its device characteristics change.
Such risk can be avoided as long as a rotation angle of a notch in each wafer can be measured after bonding and a bonded wafer having the notch shift can be specified to measure a shift amount of the rotation angle, but there is no method for accurately measuring the rotation angle of the notch of each of the base wafer and the bond wafer in a bonded wafer manufacturing line.